A nonvolatile memory device having a rewritable nonvolatile memory is increasingly demanded mainly for a semiconductor memory card. The semiconductor memory card is high-price compared to an optical disk, media of tape, and the like, however, the demand is widely increasing as a memory medium for a portable apparatus such as a digital still camera and a mobile phone because of merits such as small-size, lightweight, vibration resistance, and easy handling. This semiconductor memory card has a flash memory as a nonvolatile main memory and includes a memory controller for controlling the memory. The memory controller controls the flash memory on the reading and writing of data in accordance with reading and writing commands from the access device such as a digital still camera and a personal computer.
Such semiconductor memory card is attached to an access device, for example, a digital still camera. The access device handles the semiconductor memory card as a removable disk and controls it by using a file system, for example, a FAT file system. The FAT file system manages file data in units of clusters by using a file allocation table (hereinafter referred to as a FAT), allocates the file data to an empty cluster, and further designates, to the nonvolatile memory device, the file data and a cluster number (a logical address) to which the file data is allocated. For example, patent document 1 discloses a nonvolatile memory system using such FAT file system in detail.
Since requiring relatively long time for the writing and erasing to a memory cell array of recording unit, a flash memory incorporated in a product such as the semiconductor memory card and a portable audio is configured so as to collectively erase and write data of a plurality of the memory cells. Specifically, the flash memory is composed of a plurality of physical blocks and the physical block includes a plurality of pages, and the data is erased in units of the physical blocks and is written in units of the pages.
The flash memory has problems with reliability that a physical block to which data is written changes into a bad block during the writing of data and that the number of times of the rewriting is limited. To manage these problems, the memory controller executes a substitute process for a physical block which generated a defect and executes a wear leveling process for avoiding concentration of the rewriting to a certain physical block. The memory controller internally includes a physical region management table and a logical-physical conversion table, and manages physical addresses of the flash memory by using them. In initialization processing at application of the power source, the memory controller creates the physical region management table and the logical-physical conversion table in an internally provided RAM by checking a recording status of the flash memory in order to simplify such management of the addresses. The memory controller notifies the access device of completion of the initialization processing after the tables have been created, and permits the access device to send commands for reading and writing file data. For the subsequent read and the write commands sent from the access device, the memory controller can easily specify, to the flash memory, a physical address of a target to which data is written or from which data is read.
Patent document 2 discloses a technique for rationalizing this initialization processing. According to Patent document 2, when the table corresponding to a part of region of the flash memory has been created during the initialization processing, it is notified to the access device that the initialization has been partially completed. This enables the access device to immediately access the memory card to execute any processing or prevents the access device from faultily recognizing that an error has occurred in the memory card.
Patent document 1: Japanese Unexamined Patent Publication No. 2001-188701
Patent document 2: Japanese Unexamined Patent Publication No. 2000-90004